Semiconductor device packaging technologies have evolved to develop smaller, cheaper, and more environmentally-friendly packages. Wafer-level packaging is a chip-scale packaging technology that encompasses a variety of techniques whereby integrated circuit chips are packaged at wafer level, prior to singulation. Wafer level packaging extends the wafer fabrication processes to include device interconnection and device protection processes. Consequently, wafer level packaging streamlines the manufacturing process by allowing for the integration of wafer fabrication, packaging, testing, and burn-in processes at the wafer level.
Wafer-level package devices are mounted to flexible or printed circuit boards, which furnish mechanical support to the devices and electrical connectivity between the devices and various electronic components. Generally, traces formed on the printed circuit board provide conduits between the bump assemblies of the mounted wafer-level package devices and other electronic components.